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Single-chip built-in FET type Switching Regulator Series
High-efficiency Step-down Switching Regulators with Built-in Power MOSFET
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
No.09027EAT33
Description ROHM's high efficiency step-down switching regulators (BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN) are the power supply designed to produce a low voltage including 1 volts from 5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control system to provide faster transient response to sudden change in load. Features 1) Offers fast transient response with current mode PWM control system. 2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) TM and SLLM (Simple Light Load Mode) 3) Incorporates soft-start function. 4) Incorporates thermal protection and ULVO functions. 5) Incorporates short-current protection circuit with time delay function. 6) Incorporates shutdown function 7) Employs small surface mount package MSOP8 (BD9106FVM,BD9107FVM,BD9109FVM), HSON8 (BD9120HFN), SON008V5060 (BD9110NV) Use Power supply for LSI including DSP, Micro computer and ASIC Line up Parameter Input Voltage Output Voltage Output Current UVLO threshold Voltage Short-current protection with time delay function Soft start function Standby current Operating Temperature Range Package Operating Conditions (Ta=25) Parameter VCC voltage PVCC voltage EN voltage SW average output current
*1 Pd should not be exceeded.
BD9106FVM 4.05.5V Adjustable (1.02.5V) 0.8A Max. 3.4V Typ.
BD9107FVM 4.05.5V Adjustable (1.01.8V) 1.2A Max. 2.7V Typ.
BD9109FVM 4.55.5V 3.302% 0.8A Max. 3.8V Typ. built-in built-in 0A Typ.
BD9110NV 4.55.5V Adjustable (1.02.5V) 2.0A Max. 3.7V Typ.
BD9120HFN 2.74.5V Adjustable (1.01.5V) 0.8A Max. 2.5V Typ.
-25+85
-25+85 MSOP8
-25+85
-25+105 SON008V5060
-25+85 HSON8
Symbol VCC *1 PVCC *1 EN Isw *1
BD9106FVM Min. 4.0 4.0 0 Max. 5.5 5.5 VCC 0.8
BD9107FVM Min. 4.0 4.0 0 Max. 5.5 5.5 VCC 1.2
BD9109FVM Min. 4.5 4.5 0 Max. 5.5 5.5 VCC 0.8
BD9110NV Min. 4.5 4.5 0 Max. 5.5 5.5 VCC 2.0
BD9120HFN Min. 2.7 2.7 0 Max. 4.5 4.5 VCC 0.8
Unit V V V A
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1/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Absolute Maximum Rating (Ta=25) Parameter VCC voltage PVCC voltage EN voltage SW,ITH voltage Power dissipation 1 Power dissipation 2 Operating temperature range Storage temperature range Maximum junction temperature
*2 *3 *4 *5 *6 *7 *8
Technical Note
Symbol VCC PVCC EN SW,ITH Pd1 Pd2 Topr Tstg Tjmax
BD910FVM -0.3+7 *2 -0.3+7 *2 -0.3+7 -0.3+7 387.5*3 587.4*4 -25+85 -55+150 +150
Limits BD9110NV -0.3+7 *2 -0.3+7 *2 -0.3+7 -0.3+7 900*5 3900*6 -25+105 -55+150 +150
BD9120HFN -0.3+7 *2 -0.3+7 *2 -0.3+7 -0.3+7 1350*7 1750*8 -25+85 -55+150 +150
Unit V V V V mW mW
Pd should not be exceeded. Derating in done 3.1mW/ for temperatures above Ta=25. Derating in done 4.7mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB. Derating in done 7.2mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB which has 1 layer (3%) of copper on the back side). Derating in done 31.2mW/ for temperatures above Ta=25, Mounted on a board according to JESD51-7. Derating in done 10.8mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB which has 1 layer (7%) of copper on the back side). Derating in done 14mW/ for temperatures above Ta=25, Mounted on 70mmx70mmx1.6mm Glass Epoxy PCB which has 1 layer (65%) of copper on the back side).
Electrical Characteristics BD9106FVM (Ta=25, VCC=5V, EN=VCC, R1=20k, R2=10k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby current ISTB 0 10 A Bias current ICC 250 400 A EN Low voltage VENL GND 0.8 V EN High voltage VENH 2.0 VCC V EN input current IEN 1 10 A Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance *9 RONP 0.35 0.60 Nch FET ON resistance *9 RONN 0.25 0.50 ADJ Voltage VADJ 0.780 0.800 0.820 V *9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO threshold voltage VUVLOTh 3.2 3.4 3.6 V UVLO hysteresis voltage VUVLOHys 50 100 200 mV Soft start time TSS 1.5 3 6 ms Timer latch time TLATCH 0.5 1 2 ms
*9 Design GuaranteeOutgoing inspection is not done on all products
Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V
ADJ=H ADJ=L VCC=HL
BD9107FVM (Ta=25, VCC=5V, EN=VCC, R1=20k, R2=10k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby current ISTB 0 10 A Bias current ICC 250 400 A EN Low voltage VENL GND 0.8 V EN High voltage VENH 2.0 VCC V EN input current IEN 1 10 A Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance *9 RONP 0.35 0.60 Nch FET ON resistance *9 RONN 0.25 0.50 ADJ Voltage VADJ 0.780 0.800 0.820 V *9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO threshold voltage VUVLOTh 2.6 2.7 2.8 V UVLO hysteresis voltage VUVLOHys 150 300 600 mV Soft start time TSS 0.5 1 2 ms Timer latch time TLATCH 0.5 1 2 ms
*9 Design GuaranteeOutgoing inspection is not done on all products
Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V
VOUT =H VOUT =L VCC=HL
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2/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Electrical Characteristics BD9109FVM (Ta=25, VCC=PVCC=5V, EN= VCC unless otherwise specified.) Parameter Symbol Min. Typ. Max. Standby current ISTB 0 10 Bias current ICC 250 400 EN Low voltage VENL GND 0.8 EN High voltage VENH 2.0 VCC EN input current IEN 1 10 Oscillation frequency FOSC 0.8 1 1.2 Pch FET ON resistance *9 RONP 0.35 0.60 Nch FET ON resistance *9 RONN 0.25 0.50 Output voltage VOUT 3.234 3.300 3.366 ITH SInk current ITHSI 10 20 ITH Source Current ITHSO 10 20 UVLO threshold voltage VUVLO1 3.6 3.8 4.0 UVLO hysteresis voltage VUVLO2 3.65 3.9 4.2 Soft start time TSS 0.5 1 2 Timer latch time TLATCH 1 2 3 Output Short circuit VSCP 2 2.7 Threshold Voltage
*9 Design GuaranteeOutgoing inspection is not done on all products
Technical Note
Unit A A V V A MHz V A A V V ms ms V
Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V VOUT =H VOUT =L VCC=HL VCC=LH SCP/TSD operated VOUT =HL
BD9110NV (Ta=25, VCC=PVCC=5V, EN=VCC, R1=10k,R2=5k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Standby current ISTB 0 10 A Bias current ICC 250 350 A EN Low voltage VENL GND 0.8 V EN High voltage VENH 2.0 VCC V EN input current IEN 1 10 A Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance *9 RONP 200 320 m Nch FET ON resistance *9 RONN 150 270 m ADJ Voltage VADJ 0.780 0.800 0.820 V *9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A ITH Source Current ITHSO 10 20 A UVLO threshold voltage VUVLOTh 3.5 3.7 3.9 V UVLO hysteresis voltage VUVLOHys 50 100 200 mV Soft start time TSS 2.5 5 10 ms Timer latch time TLATCH 0.5 1 2 ms
*9 Design GuaranteeOutgoing inspection is not done on all products
Conditions EN=GND Standby mode Active mode VEN=5V PVCC=5V PVCC=5V
VOUT =H VOUT =L VCC=HL
BD9120HFN (Ta=25, VCC=PVCC=3.3V, EN=VCC, R1=20k, R2=10k unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Conditions Standby current ISTB 0 10 A EN=GND Bias current ICC 200 400 A EN Low voltage VENL GND 0.8 V Standby mode EN High voltage VENH 2.0 VCC V Active mode EN input current IEN 1 10 A VEN=3.3V Oscillation frequency FOSC 0.8 1 1.2 MHz Pch FET ON resistance *9 RONP 0.35 0.60 PVCC=3.3V Nch FET ON resistance *9 RONN 0.25 0.50 PVCC=3.3V ADJ Voltage VADJ 0.780 0.800 0.820 V *9 Output voltage VOUT 1.200 V ITH SInk current ITHSI 10 20 A VOUT =H ITH Source Current ITHSO 10 20 A VOUT =L UVLO threshold voltage VUVLO1 2.400 2.500 2.600 V VCC=HL UVLO hysteresis voltage VUVLO2 2.425 2.550 2.700 V VCC=LH Soft start time TSS 0.5 1 2 ms Timer latch time TLATCH 1 2 3 ms SCP/TSD operated Output Short circuit VOUTx0.5 VOUTx0.7 V VOUT =HL VSCP Threshold Voltage
*9 Design GuaranteeOutgoing inspection is not done on all products
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3/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Characteristics dataBD9106FVM
2.0
2.0
2.0
Technical Note
VOUT=1.8V
OUTPUT VOLTAGE:VOUT[V]
VOUT=1.8V
1.5
OUTPUT VOLTAGE:VOUT[V]
VOUT=1.8V
OUTPUT VOLTAGE:VOUT[V]
1.5
Ta=25 Io=0A
1.5
1.0
1.0
1.0
0.5
0.5
VCC=5V Ta=25 Io=0A
0 1 2 3 4 5
0.5
VCC=5V Ta=25
0.0 0 1 2 3
0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5
0.0 EN VOLTAGE:VEN[V]
OUTPUT CURRENT:IOUT [A]
Fig.1 Vcc-Vout
Fig.2 Ven-Vout
Fig.3 Iout-Vout
1.85 1.84
OUTPUT VOLTAGE:VOUT[V]
100
1.20
VOUT=1.8V VCC=5V Io=0A
90 80 EFFICIENCY:[%] 70 60 50 40 30 20 10 0
VOUT=1.8V
FREQUENCY:FOSC[MHz]
1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80
VCC=5V
1.83 1.82 1.81 1.80 1.79 1.78 1.77 1.76 1.75
VCC=5V Ta=25
1 10 100 OUTPUT CURRENT:IOUT[mA] 1000
-25 -15
-5
5
15
25
35
45
55 65
75
85
-25 -15 -5
5
15
25 35
45 55
65 75
85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.4 Ta-Vout
Fig.5 Efficiency
Fig.6 Ta-Fosc
0.40 0.35
ON[]
2.0 1.8 1.6
EN VOLTAGE:VEN[V]
350
VCC=5V
CIRCUIT CURRENT:I CC [A]
VCC=5V
300 250 200 150 100 50 0
0.30 0.25 0.20 0.15 0.10 0.05 0.00
PMOS
1.4 1.2 1.0 0.8 0.6 0.4
ON RESISTANCE:R
NMOS
VCC=5V
-25 -15 -5 5 15 25 35 45 55 65 75 85
0.2 0.0
-25 -15 -5 5 15 25 35 45 55 65 75 85
-25 -15
-5
5
15
25 35
45
55
65
75
85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.7 Ta-Ronn, Ronp
Fig.8 Ta-Ven
Fig.9 Ta-Icc
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4/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
1.2
FREQUENCY:FOSC[MHz]
1.1
VCC=PVCC =EN
VOUT=1.8V
SLLM control
VOUT=1.8V
SW
1
0.9
VOUT VCC=5V Ta=25 Io=0A
4 4.5 5 INPUT VOLTAGE:VCC[V] 5.5
VOUT VCC=5V Ta=25
0.8
Fig.10 Vcc-Fosc
Fig.11 Soft start waveform
Fig.12 SW waveform Io=10mA
PWM control
VOUT=1.8V VOUT
VOUT=1.8V VOUT
VOUT=1.8V
SW
VOUT VCC=5V Ta=25
IOUT VCC=5V Ta=25
IOUT VCC=5V Ta=25
Fig.13 SW waveform Io=200mA
Fig. 14 Transient response Io=100600mA(10s)
Fig.15 Transient response Io=600100mA(10s)
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5/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Characteristics dataBD9107FVM
2.0
Technical Note
2.0
2.0
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
1.5
1.5
OUTPUT VOLTAGE:VOUT[V]
VOUT=1.5V Ta=25 Io=0A
VOUT=1.5V
1.5
VOUT=1.5V
VCC=5V Ta=25
1.0
1.0
1.0
0.5
0.5
VCC=5V Ta=25 Io=0A
0 1 2 3 EN VOLTAGE:VEN[V] 4 5
0.5
0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5
0.0
0.0 0 1 2 3 OUTPUT CURRENT:IOUT [A]
Fig.16 Vcc-Vout
Fig.17 Ven-Vout
Fig.18 Iout-Vout
1.55 1.54
OUTPUT VOLTAGE:VOUT[V]
100
1.20
FREQUENCY:FOSC[MHz]
1.53 1.52 1.51 1.50 1.49 1.48 1.47 1.46 1.45
VOUT=1.5V VCC=5V Io=0A
EFFICIENCY:[%]
90 80 70 60 50 40 30 20 10 0
VOUT=1.5V
1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80
VCC=5V
VCC=5V Ta=25
1 10 100 1000 OUTPUT CURRENT:IOUT[mA] 10000
-25 -15
-5
5
15
25
35
45
55
65
75
85
-25 -15 -5
5
15
25 35
45 55
65 75
85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.19 Ta-Vout
Fig.20 Efficiency
Fig.21 Ta-Fosc
0.40 0.35
ON RESISTANCE:RON[]
2.0 1.8
CIRCUIT CURRENT:ICC[A]
350
VCC=5V
EN VOLTAGE:VEN[V]
0.30 0.25 0.20 0.15 0.10 0.05 0.00
PMOS
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
75 85
300 250 200 150 100 50 0
VCC=5V
NMOS VCC=5V
Fig.22 -NMOS FET ON
-25 -15 -5 5 15 25 35 45 55 65
-25 -15 -5
5
15 25 35 45 55 65 75 85
-25 -15 -5
5
15 25 35 45 55 65 75 85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.22 Ta-RONN, RONP
Fig.23 Ta-VEN
Fig.24 Ta-ICC
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6/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
1.2
Technical Note
FREQUENCY:FOSC[MHz]
VCC=PVCC =EN
1.1
VOUT=1.5V
SLLM control
VOUT=1.5V
SW
1
0.9
VOUT VCC=5V Ta=25 Io=0A
4 4.5 5 INPUT VOLTAGE:VCC[V] 5.5
VOUT VCC=5V Ta=25
0.8
Fig.25 Vcc-Fosc
Fig.26 Soft start waveform
Fig.27 SW waveform Io=10mA
PWM control
VOUT=1.5V VOUT
VOUT=1.5V VOUT
VOUT=1.5V
SW
VOUT VCC=5V Ta=25
IOUT VCC=5V Ta=25
IOUT VCC=5V Ta=25
Fig.28 SW waveform Io=500mA
Fig. 29 Transient response Io=100600mA(10s)
Fig.30 Transient response Io=600100mA(10s)
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7/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Characteristics dataBD9109FVM
4.0
4.0
4.0
Technical Note
Ta=25 Io=0A
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
3.0
3.0
3.0
2.0
2.0
2.0
1.0
1.0
0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5
0.0 0 1
VCC=5V Ta=25 Io=0A
2 3 EN VOLTAGE:VEN[V] 4 5
1.0
VCC=5V Ta=25
0.0 0 1 2 OUTPUT CURRENT:IOUT [A] 3
Fig.31 Vcc-Vout
Fig.32 Ven-Vout
Fig.33 Iout-Vout
3.50 3.45
OUTPUT VOLTAGE:VOUT[V]
100
FREQUENCY:FOSC[MHz]
3.40 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.00
VCC=5V Io=0A
EFFICIENCY:[%]
1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80
1 10 100 OUTPUT CURRENT:IOUT[mA] 1000
-25 -15 -5 5 15 25 35 45 55 65 75 85
90 80 70 60 50 40 30 20 10 0
VCC=5V
VCC=5V Ta=25
-25 -15
-5
5
15
25 35
45
55
65
75
85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig. 34 Ta-Vout
Fig.35 Efficiency
Fig.36 Ta-Fosc
0.40 0.35
ON RESISTANCE:RON[]
2.0
350
VCC=5V
EN VOLTAGE:VEN[V]
1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
VCC=5V
CIRCUIT CURRENT:ICC[A]
300 250 200 150 100 50 0
VCC=5V
0.30 0.25 0.20 0.15 0.10 0.05 0.00
PMOS
NMOS
-25 -15 -5
5
15 25 35 45 55 65 75 85
-25 -15 -5
5
15 25 35 45 55 65 75 85
-25 -15 -5
5
15 25 35 45 55 65 75 85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.37 Ta-Ronn, Ronp
Fig.38 Ta-Ven
Fig.39 Ta-Icc
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8/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
1.2
FREQUENCY:FOSC[MHz]
1.1
VCC=PVCC =EN SW
SLLM control
1
0.9
VOUT VCC=5V Ta=25 Io=0A
4 4.5 5 INPUT VOLTAGE:VCC[V] 5.5
VOUT VCC=5V Ta=25
0.8
Fig.40 Vcc-Fosc
Fig.41 Soft start waveform
Fig.42 SW waveform Io=10mA
PWM control VOUT SW VOUT
IOUT VOUT VCC=5V Ta=25 IOUT VCC=5V Ta=25 VCC=5V Ta=25
Fig.43 SW waveform Io=500mA
Fig. 44 Transient response Io=100600mA(10s)
Fig.45 Transient response Io=600100mA(10s)
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9/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Characteristics dataBD9110NV
2.0 2.0
2.0
Technical Note
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
1.5
1.5
OUTPUT VOLTAGE:VOUT[V]
VOUT=1.4V Ta=25 Io=0A
VOUT=1.4V VCC=5V Ta=25 Io=0A
1.5
VOUT=1.4V
1.0
1.0
1.0
0.5
0.5
0.5
0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5
0.0 0 1 2 3 EN VOLTAGE:VEN[V] 4 5
VCC=5V Ta=25
0.0 0 1 2 3 OUTPUT CURRENT:IOUT [A] 4
Fig.46 Vcc-Vout
Fig.47 Ven-Vout
Fig.48 Iout-Vout
1.45 1.44 1.43
OUTPUT VOLTAGE:VOUT[V]
100
VOUT=1.4V VCC=5V Io=0A
EFFICIENCY:[%]
90 80 70 60 50 40 30 20 10 0 10
VOUT=1.4V VCC=5V Ta=25
FREQUENCY:FOSC[MHz]
1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80
VCC=5V
1.42 1.41 1.40 1.39 1.38 1.37 1.36 1.35
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105
TEMPERATURE:Ta[]
100 1000 OUTPUT CURRENT:IOUT[mA]
10000
-25 -15
-5
5
15
25
35
45
55
65
75
85
95 105
TEMPERATURE:Ta[]
Fig. 49 Ta-Vout
Fig.50 Efficiency
Fig.51 Ta-Fosc
0.40 0.35
ON []
2.0
400
VCC=5V
1.8 1.6
EN VOLTAGE:VEN[V]
VCC=5V
CIRCUIT CURRENT:I CC [A]
350 300 250 200 150 100 50 0
VCC=5V
0.30 0.25 0.20 0.15 0.10 0.05 0.00
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
-25 -15 -5 5 15 25 35 45 55 65 75 85 95 105
ON RESISTANCE:R
PMOS NMOS
-25 -15
-5
5
15
25
35
45
55
65
75
85
95 105
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.52 Ta-Ronn, Ronp
Fig.53 Ta-Ven
Fig.54 Ta-Icc
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10/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
1.2
Ta=25
FREQUENCY:FOSC[MHz] 1.1
VCC=PVCC =EN
VOUT=1.4V
SLLM control SW
VOUT=1.4V
1
0.9
VOUT
VOUT VCC=5V Ta=25 Io=0A VCC=5V Ta=25
0.8 4.5
5 INPUT VOLTAGE:VCC[V]
5.5
Fig.55 Vcc-Fosc
Fig.56 Soft start waveform
Fig.57 SW waveform Io=10mA
PWM control
VOUT=1.4V
VOUT=1.4V VOUT
VOUT=1.4V
SW
VOUT
IOUT VOUT VCC=5V Ta=25 IOUT VCC=5V Ta=25 VCC=5V Ta=25
Fig.58 SW waveform Io=500mA
Fig. 59 Transient response Io=100600mA(10s)
Fig.60 Transient response Io=600100mA(10s)
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11/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Characteristics dataBD9120HFN
2.0
2.0
2.0
Technical Note
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
OUTPUT VOLTAGE:VOUT[V]
1.5
VOUT=1.5V Ta=25 Io=0A
VOUT=1.5V
1.5
1.5
VOUT=1.5V
1.0
1.0
1.0
0.5
0.5
VCC=3.3V Ta=25 Io=0A
0 1 2 3 EN VOLTAGE:VEN[V] 4 5
0.5
VCC=3.3V Ta=25
0.0 0 1 2 OUTPUT CURRENT:IOUT [A] 3
0.0 0 1 2 3 4 INPUT VOLTAGE:VCC[V] 5
0.0
Fig.61 Vcc-Vout
Fig.62 Ven-Vout
Fig.63 Iout-Vout
1.55 1.54 1.53
OUTPUT VOLTAGE:VOUT[V]
100
1.20
EFFICIENCY:[%]
1.52 1.51 1.50 1.49 1.48 1.47 1.46 1.45
-25 -15 -5 5 15 25 35 45 55 65 75 85
70 60 50 40 30 20 10 0 1
FREQUENCY:FOSC[MHz]
VOUT=1.5V VCC=3.3V Io=0A
90 80
VOUT=1.5V
1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80
VCC=3.3V
VCC=3.3V Ta=25
10 100 OUTPUT CURRENT:IOUT[mA] 1000
-25 -15
-5
5
15
25
35
45
55
65
75
85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig. 64 Ta-Vout
Fig.65 Efficiency
Fig.66 Ta-Fosc
0.40 0.35
ON[]
Fig. 64 Ta-VOUT
VCC=3.3V
2.0 1.8 1.6
EN VOLTAGE:VEN[V]
VCC=3.3V
CIRCUIT CURRENT:I CC [A]
300 270 240 210 180 150 120 90 60 30 0
VCC=3.3V
0.30 0.25 0.20 0.15 0.10 0.05 0.00
-25 -15 -5 5 15 25 35 45 55 65 75 85
1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0
ON RESISTANCE:R
PMOS
NMOS
TEMPERATURE:Ta[]
-25 -15
-5
5
15
25
35
45
55
65
75
85
-25 -15
-5
5
15
25
35
45
55
65
75
85
TEMPERATURE:Ta[]
TEMPERATURE:Ta[]
Fig.67 Ta-Ronn, Ronp
Fig.68 Ta-Ven
Fig.69 Ta-Icc
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12/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
1.2
Ta=25
FREQUENCY:FOSC[MHz] 1.1
VOUT=1.5V VCC=PVCC =EN SW
SLLM control
VOUT=1.5V
1
0.9
VOUT VOUT VCC=3.3V Ta=25 Io=0A VCC=3.3V Ta=25
0.8 2.7
3.6 INPUT VOLTAGE:VCC[V]
4.5
Fig.70 Vcc-Fosc
Fig.71 Soft start waveform
Fig.72 SW waveform Io=10mA
PWM control
VOUT=1.5V
VOUT=1.5V VOUT
VOUT=1.5V
SW
VOUT
IOUT VOUT VCC=3.3V Ta=25 IOUT VCC=3.3V Ta=25 VCC=3.3V Ta=25
Fig.73 SW waveform Io=200mA
Fig. 74 Transient response Io=100600mA(10s)
Fig.75 Transient response Io=600100mA(10s)
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13/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Block Diagram, Application Circuit BD9106FVM, BD9107FVM
EN 3
Technical Note
VCC
VREF Current Comp. RQ Gm Amp. 3 EN SW 6 SLOPE VCC Soft Start OSC S CLK
8 7
VCC 5V Input PVCC 10F
1 2
ADJ ITH
VCC
8
PVCC
7
Current Sense/ Protect + Driver Logic 5 4 4.7H 6 SW 10F Output
4
GND
PGND
5
UVLO TSD
PGND GND
TOP View
1 2
ADJ
ITH
Fig.76 BD9106FVM,BD9107FVM TOP View
Fig.77 BD9106FVM,BD9107FVM Block Diagram
BD9109FVM
EN 3
VCC
VREF 1 2 VOUT ITH VCC 8 Current Comp. RQ Gm Amp. SLOPE VCC 4 GND PGND 5 Soft Start OSC S CLK Current Sense/ Protect
8 7
VCC 5V Input PVCC 10F
PVCC
7
3
EN
SW
6
4.7H + Driver Logic 5 4 6 SW 10F PGND GND
Output
UVLO TSD SCP
TOP View
1
VOUT
2
ITH
Fig.78 BD9109FVM TOP View
Fig.79. BD9109FVM Block Diagram
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14/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
BD9110NV
VCC EN ADJ 1 VCC 2 ITH 3 GND 4 8 EN 8 2 VCC 5V Input 10F
VREF
7 PVCC 6 SW 5 PGND Gm Amp. + VCC Soft Start UVLO TSD SLOPE OSC Current Comp + RQ S CLK Current Sense/ Protect + Driver Logic
7 PVCC
2.2H 6 SW 22F
Output
TOP View
5 PGND 4 GND
1 ADJ
3
ITH CITH
RITH R1 R2
Fig.80 BD9110NV TOP View
Fig.81 BD9110NV Block Diagram
BD9120HFN
VCC EN
3 VREF 8 7 Current Comp + R S Q Current Sense/ Protect + Driver Logic 4.7H 6 SW 10F Output VCC PVCC 3.3V Input 10F
1 2 3 4
ADJ ITH EN GND
VCC PVCC SW PGND
8 7 6 5
TOP View
Gm Amp. + VCC Soft Start SLOPE
CLK OSC
UVLO TSD SCP 5 PGND 4 GND
1
ADJ
2
ITH CITH
RITH R1 R2
Fig.82 BD9120HFN TOP View
Fig.83 BD9120HFN Block Diagram
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15/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Pin number and function BD9106FVM, BD9107FVM, BD9109FVM Pin No. Pin name 1 ADJ/VOUT 2 ITH 3 EN 4 GND 5 PGND 6 SW 7 PVCC 8 VCC
Technical Note
PIN function Output voltage detect pin/ ADJ for BD910607FVM GmAmp output pin/Connected phase compensation capacitor Enable pin(Active High) Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin VCC power supply input pin
BD9110NV Pin No. 1 2 3 4 5 6 7 8
Pin name ADJ VCC ITH GND PGND SW PVCC EN
PIN function Output voltage adjust pin VCC power supply input pin GmAmp output pin/Connected phase compensation capacitor Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin Enable pin(Active High)
BD9120HFN Pin No. 1 2 3 4 5 6 7 8
Pin name ADJ ITH EN GND PGND SW PVCC VCC
PIN function Output voltage adjust pin GmAmp output pin/Connected phase compensation capacitor Enable pin(Active High) Ground Nch FET source pin Pch/Nch FET drain output pin Pch FET source pin VCC power supply input pin
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16/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
Information on advantages Advantage 1Offers fast transient response with current mode control system. Conventional product (VOUT of which is 3.3 volts) BD9109FVM (Load response IO=100mA600mA)
VOUT 228mV VOUT 140mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by about 40%. Fig.84 Comparison of transient response Advantage 2 Offers high efficiency for all load range. For lighter load: TM Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load.
Efficiency [%]
100
SLLMTM
For heavier load: Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. ON resistance of P-channel MOS FET: 0.20.35 (Typ.) ON resistance of N-channel MOS FET: 0.150.25 (Typ.)
50
PWM
inprovement by SLLM system improvement by synchronous rectifier
0 0.001
0.01 0.1 Output current Io[A]
1
Fig.85 Efficiency
Achieves efficiency improvement for heavier load. Offers high efficiency for all load range with the improvements mentioned above.
Advantage 3Supplied in smaller package due to small-sized power MOS FET incorporated. (3 package like MOSP8, HSON8, SON008V5060) Allows reduction in size of application products Output capacitor Co required for current mode control: 10 F ceramic capacitor Inductance L required for the operating frequency of 1 MHz: 4.7 H inductor (BD9110NV:Co=22F, L=2.2H) Reduces a mounting area required.
VCC 15mm Cin CIN DC/DC Convertor Controller RITH L VOUT Co 10mm CITH CO L
RITH CITH
Fig.86 Example application
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17/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
Operation BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN are a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utilizes switching TM operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load to improve efficiency. Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a N-channel MOS FET is turned OFF), and an inductor current IL increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation.
TM SLLM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency.
SENSE Current Comp Level Shift Gm Amp. ITH OSC FB RESET SET RQ S Driver Logic SW Load IL VOUT
VOUT
Fig.87 Diagram of current mode PWM control
Current Comp SET PVCC SENSE FB GND GND GND IL(AVE) SET Current Comp PVCC SENSE FB GND GND
RESET SW IL
RESET SW
GND IL 0A
VOUT
VOUT(AVE)
VOUT
VOUT(AVE)
Not switching
Fig.88 PWM switching timing chart
Fig.89 SLLM switching timing chart
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18/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
Description of operations Soft-start function EN terminal shifted to "High" activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. Shutdown function With EN terminal shifted to "Low", the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 F (Typ.). UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of 50300 mV (Typ.) is provided to prevent output chattering.
Hysteresis 50300mV
VCC
EN
VOUT
Tss Soft start Standby mode Operating mode Standby mode UVLO
Tss
Tss
Operating mode
Standby mode EN
Operating mode
Standby mode
UVLO *Soft Start time(typ.)
UVLO
Fig.90 Soft start, Shutdown, UVLO timing chart BD9106FVM 3 BD9107FVM 1 BD9109FVM 1 BD9110NV 5 BD9120HFN 1 Unit msec
Tss
Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(TLATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO.
EN
Output OFF latch VOUT Limit IL 1msec Standby mode *Timer Latch time (typ.) EN Standby mode Timer latch EN
Operating mode
Operating mode
Fig.91 Short-current protection circuit with time delay timing chart BD9106FVM 1 BD9107FVM 1 BD9109FVM 2 BD9110NV 1 BD9120HFN 2 Unit msec
TLATCH
In addition to current limit circuit, output short detect circuit is built in on BD9109FVM and BD9120HFN. If output voltage fall below 2V(typ, BD9109FVM) or Voutx0.5(typ,BD9120HFN), output voltage will hold turned OFF.
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19/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Switching regulator efficiency Efficiency may be expressed by the equation shown below: = VOUTxIOUT VinxIin x100[%]= POUT Pin x100[%]= POUT POUT+PD x100[%]
Technical Note
Efficiency may be improved by reducing the switching regulator power dissipation factors PD as follows: Dissipation factors: 2 1) ON resistance dissipation of inductor and FETPD(I R) 2) Gate charge/discharge dissipationPD(Gate) 3) Switching dissipationPD(SW) 4) ESR dissipation of capacitorPD(ESR) 5) Operating current dissipation of ICPD(IC) 1)PD(I R)=IOUT x(RCOIL+RON) (RCOIL[] DC resistance of inductor, RON[] ON resistance of FETIOUT[A] Output current.) 2)PD(Gate)=CgsxfxV (Cgs[F]Gate capacitance of FET,f[H]Switching frequency,V[V]Gate driving voltage of FET) 3)PD(SW)= Vin2xCRSSxIOUTxf IDRIVE (CRSS[F]Reverse transfer capacitance of FETIDRIVE[A]Peak current of gate.)
2 2
2 4)PD(ESR)=IRMS xESR (IRMS[A]Ripple current of capacitor,ESR[]Equivalent series resistance.) 5)PD(IC)=VinxICC (ICC[A]Circuit current.)
Consideration on permissible dissipation and heat generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation.
1000 Power dissipation:Pd [mW] 1.5 1.5
for SON008V5060 ROHM standard 1layer board j-a=138.9/W Using an IC alone j-a=195.3/W
Power dissipation:Pd [W]
Power dissipation:Pd [W] 75 85 100
800 587.4mW
mounted on glass epoxy PCB j-a=212.8/W Using an IC alone j-a=322.6/W
1.15W 1.0
mounted on glass epoxy PCB j-a=133.0/W Using an IC alone j-a=195.3/W
0.90W 1.0
600
400
387.5mW
0.63W 0.5
0.64W 0.5
200
0 0 25 50 75 85 100 125 150 Ambient temperature:Ta []
0 0 25 50 125 150 Ambient temperature:Ta []
0 0 25 50 75 100105 125 150 Ambient temperature:Ta []
Fig.92 Thermal derating curve (MSOP8)
Fig.93 Thermal derating curve (HSON8)
Fig.94 Thermal derating curve (SON008V5060)
If VCC=5V, VOUT=3.3V, RCOIL=0.15, RONP=0.35, RONN=0.25 IOUT=0.8A, for example, D=VOUT/VCC=3.3/5=0.66 RON=0.66x0.35+(1-0.66)x0.25 =0.231+0.085 =0.316[] P=0.82x(0.15+0.316) 298[mV]
P=IOUT2x(RCOIL+RON) RON=DxRONP+(1-D)xRONN DON duty (=VOUT/VCC) RCOILDC resistance of coil RONPON resistance of P-channel MOS FET RONNON resistance of N-channel MOS FET IOUTOutput current
As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed.
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20/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Selection of components externally connected 1. Selection of inductor (L)
IL IL VCC
Technical Note
The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. IL= (VCC-VOUT)xVOUT LxVCCxf [A](1)
IL VOUT L Co
Appropriate ripple current at output should be 30% more or less of the maximum output current. IL=0.3xIOUTmax. [A](2) L= (VCC-VOUT)xVOUT ILxVCCxf [H](3)
(IL: Output ripple current, and f: Switching frequency) Fig.95 Output ripple current * Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If VCC=5V, VOUT=3.3V, f=1MHz, IL=0.3x0.8A=0.24A, for example,(BD9109FVM) (5-3.3)x3.3 L= =4.675 4.7[H] 0.24x5x1M * Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. Output ripple voltage is determined by the equation (4)
VOUT
VOUT=ILxESR [V](4) (IL: Output ripple current, ESR: Equivalent series resistance of output capacitor) *Rating of the capacitor should be determined allowing sufficient margin against output voltage. Less ESR allows reduction in output ripple voltage.
L
ESR Co
Fig.96 Output capacitor As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be determined with consideration on the requirements of equation (5): TSSx(Ilimit-IOUT) Tss: Soft-start time Co (5) Ilimit: Over current detection level, 2A(Typ) VOUT In case of BD9109FVM, for instance, and if VOUT=3.3V, IOUT=0.8A, and TSS=1ms, 1mx(2-0.8) Co 364 [F] 3.3 Inappropriate capacitance may cause problem in startup. A 10 F to 100 F ceramic capacitor is recommended. 3. Selection of input capacitor (Cin)
VCC
Cin
VOUT L Co
Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (6): VOUT(VCC-VOUT) IRMS=IOUTx [A](6) VCC < Worst case > IRMS(max.) IOUT When VCC is twice the Vout, IRMS= 2
If VCC=5V, VOUT=3.3V, and IOUTmax.=0.8A, (BD9109FVM) 3.3(5-3.3) IRMS=0.8x =0.38[ARMS] 5 A low ESR 10F/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency. Fig.97 Input capacitor
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21/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min.) A Gain [dB] fp(Max.) 0 IOUTMin. 0 IOUTMax. fz(ESR)
1 2xROxCO 1 fz(ESR)= 2xESRxCO fp= Pole at power amplifier When the output current decreases, the load resistance Ro increases and the pole frequency lowers. fp(Min.)= 1 2xROMax.xCO 1 2xROMin.xCO [Hz]with lighter load [Hz]with heavier load
Phase [deg]
-90
Fig.98 Open loop gain characteristics
A Gain [dB] 0 0
fp(Max.)=
fz(Amp.)
Phase [deg]
Zero at power amplifier Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacitor ESR reduces to half.) fz(Amp.)= 1 2xRITH.xCITH
-90
Fig.99 Error amp phase compensation characteristics
Cin EN VOUT VOUT ITH RITH CITH GND,PGND L SW ESR CO RO VOUT
VCC
VCC,PVCC
Fig.100 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fz(Amp.)= fp(Min.) 1 2xRITHxCITH = 1 2xROMax.xCO
5. Determination of output voltage The output voltage VOUT is determined by the equation (7): VOUT=(R2/R1+1)xVADJ(7) VADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required. Adjustable output voltage range 1.0V1.5V/ BD9107FVM, BD9120HFN 1.0V2.5V/BD106FVM, BD9110NV Use 1 k100 k resistor for R1. If a resistor of the resistance higher than 100 k is used, check the assembled set carefully for ripple voltage etc.
L 6 SW 1 ADJ R1 Co R2 Output
Fig.101 Determination of output voltage
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22/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
BD9106FVM, BD9107FVM, BD9109FVM, BD9120HFN Cautions on PC Board layout
Technical Note
1 2 RITH EN CITH 4 3
VOUT/ADJ ITH EN GND
VCC PVCC SW PGND
8 7 CIN 6 5 CO L VCC VOUT GND
Fig.102 Layout diagram BD9110NV Cautions on PC Board layout VCC R2 1 R1 2 3 RITH CITH 4 ADJ VCC ITH GND EN PVCC SW PGND 8 7 6 5 L CIN Co VOUT EN
GND Fig.103 Layout diagram
For the sections drawn with heavy line, use thick conductor pattern as short as possible. Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
The package of HSON8 (BD9120HFN) and SON008V5050 (BD9110NV) has thermal FIN on the reverse of the package. The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB.
Table1. [BD9106FVM] Symbol Part L CIN CO CITH Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor
Value 4.7H 10F 10F 750pF VOUT=1.0V VOUT=1.2V 18k 22k 22k 27k 36k
Manufacturer Sumida TDK Kyocera Kyocera murata ROHM ROHM ROHM ROHM ROHM
Series CMD6D11B VLF5014AT-4R7M1R1 CM316X5R106K10A CM316X5R106K10A GRM18series MCR10 1802 MCR10 2202 MCR10 2202 MCR10 2702 MCR10 3602
RITH
Resistance
VOUT=1.5V VOUT=1.8V VOUT=2.5V
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23/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Table2. [BD9107FVM] Symbol Part L CIN CO CITH Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor
Technical Note
Value 4.7H 10F 10F 1000pF VOUT=1.0V 4.3k 6.8k 9.1k 12k VOUT=1.2V VOUT=1.5V VOUT=1.8V
Manufacturer Sumida TDK Kyocera Kyocera murata ROHM ROHM ROHM ROHM
Series CMD6D11B VLF5014AT-4R7M1R1 CM316X5R106K10A CM316X5R106K10A GRM18series MCR10 4301 MCR10 6801 MCR10 9101 MCR10 1202
RITH
Resistance
Table3. [BD9109VM] Symbol Part L CIN CO CITH RITH Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor Resistance
Value 4.7H 10F 10F 330pF 30k
Manufacturer Sumida TDK Kyocera Kyocera murata ROHM
Series CMD6D11B VLF5014AT-4R7M1R1 CM316X5R106K10A CM316X5R106K10A GRM18series MCR10 3002
Table4. [BD9110NV] Symbol Part L CIN CO CITH Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor
Value 2.2H 10F 22F 1000pF VOUT=1.0V VOUT=1.2V
Manufacturer TDK Kyocera Kyocera murata
Series LTF5022T-2R2N3R2 CM316X5R106K10A CM316B226K06A GRM18series
RITH
Resistance
VOUT=1.5V VOUT=1.8V VOUT=2.5V
12k
ROHM
MCR10 1202
Table5. [BD9120HFN] Symbol Part L CIN CO CITH RITH Coil Ceramic capacitor Ceramic capacitor Ceramic capacitor Resistance
Value 4.7H 10F 10F 680pF VOUT=1.0V VOUT=1.2V VOUT=1.5V 8.2k 8.2k 4.7k
Manufacturer Sumida TDK Kyocera Kyocera murata ROHM ROHM ROHM
Series CMD6D11B VLF5014AT-4R7M1R1 CM316X5R106K10A CM316X5R106K10A GRM18series MCR10 8201 MCR10 8201 MCR10 4701
*The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode established between the SW and PGND pins.
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24/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
I/O equivalence circuit BD9106FVM, BD9107FVM, BD9109FVM
EN pin SW pin
VCC PVCC PVCC PVCC
Technical Note
10k EN
SW
ADJ pin (BD9106FVM, BD9107FVM)
VCC
VOUT pin (BD9109FVM)
VCC
10k ADJ
10k VOUT
ITH pin
VCC VCC
ITH
BD9110NV, BD9120HFN
EN pin
10k EN SW
SW pin
PVCC
PVCC
PVCC
ITH pin (BD9110NV)
ITH pin (BD9120HFN)
VCC VCC
ITH
ITH
ADJ pin
10k ADJ
Fig.104 I/O equivalence circuit
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25/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
Notes for use 1. Absolute Maximum Ratings While utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and power supply or GND may also cause breakdown. 4.Operation in Strong electromagnetic field} Be noted that using the IC in the strong electromagnetic radiation can cause operation failures. 5. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 7. Input to IC terminals + This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic element are formed. If a resistor is joined to a transistor terminal as shown in Fig 59: P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in (Pin A) activation of parasitic elements.
Resistance (Pin A) (Pin B) C Transistor (NPN) B E GND (Pin B) P N N Parasitic diode GND Parasitic diode or transistor N P substrate GND N B E GND Parasitic diode or transistor P+ C Parasitic diode
GND N P+ N N P substrate P P+ P+
Fig.105 Simplified structure of monorisic IC 8. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
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26/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Ordering part number
Technical Note
B
D
9
1
1
0
N
V
-
E
2
Part No. BD
Part No. 9110 9120 9106 ,9107,9109
Package
NV : SON008V5060 HFN:MSOP8 FVM:HSON8
Packaging and forming specification
E2: Embossed tape and reel (SON008V5060,) TR: Embossed tape and reel (MSOP8, HSON8)
MSOP8

2.90.1 (MAX 3.25 include BURR)
8765
Tape
0.290.15 0.60.2
+6 4 -4
Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
Quantity Direction of feed
4.00.2
2.80.1
( reel on the left hand and you pull out the tape on the right hand
1pin
)
1 234
1PIN MARK 0.475 S +0.05 0.22 -0.04 0.08 S 0.65
+0.05 0.145 -0.03
0.9MAX 0.750.05
0.080.05
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
HSON8

2.90.1 (MAX 3.1 include BURR)
(0.2)
(2.2)
(0.05)
Tape Quantity
Embossed carrier tape 3000pcs TR
The direction is the 1pin of product is at the upper right when you hold
0.475
3.0 0.2 2.8 0.1
8 765
(0.15)
(0.3)
5678
(0.45)
(0.2) (1.8)
Direction of feed
+0.1 0.13 -0.05
( reel on the left hand and you pull out the tape on the right hand
1pin
)
1234
4321
1PIN MARK
0.6MAX
S
+0.03 0.02 -0.02
0.1 0.65 0.320.1
S
0.08
M
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
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27/28
2009.05 - Rev.A
BD9106FVM,BD9107FVM,BD9109FVM,BD9110NV,BD9120HFN
Technical Note
SON008V5060
5.00.15
6.0 0.15

Tape Quantity Direction of feed Embossed carrier tape 2000pcs E2
The direction is the 1pin of product is at the upper left when you hold
1.0MAX
1PIN MARK
+0.03 0.02 -0.02 (0.22)
S
( reel on the left hand and you pull out the tape on the right hand
)
0.08 S C0.25
0.8 0.1
4.20.1 1.27
1 23 4
3.6 0.1
8
7
6
5
0.59
+0.05 0.4 -0.04
1pin
Direction of feed
(Unit : mm)
Reel
Order quantity needs to be multiple of the minimum quantity.
www.rohm.com (c) 2009 ROHM Co., Ltd. All rights reserved.
28/28
2009.05 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.
Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us.
ROHM Customer Support System
http://www.rohm.com/contact/
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